Hardware & IDEs
Reference projects, toolchains, wiring guides and build results.
Reference projects include application source, MCU configuration, transceiver control drivers and wiring guides.
| Target | Toolchain / PHY | Available project and build evidence |
|---|---|---|
| STM32G0B1RE | Arm GCC and native IAR source project / TIOL112 | GCC firmware build verified. Build and wiring guide · Native IAR project ZIP. Includes the MCU pin map, UART receive queue, wake-up interrupt and timer setup. Parameter storage: RAM. |
| Nucleo-U575ZI-Q | Zephyr 3.7.2 / TIOL112 | Firmware build verified. Pinned Zephyr project, wiring and timing guide. Uses UART 8E1, interrupt receive and a microsecond hardware timer. Parameter storage: RAM. |
| ESP32-C3-DevKitM-1 | ESP-IDF 5.4.0 / STEVAL-IOD003V1 (L6362A) | Firmware build verified. Native project and ST shield wiring guide. Requires the documented shield configuration and IN1 modification. UART error and transmit-timeout handling have host regression tests. Parameter storage: RAM. |
| Nucleo-L476RG | Zephyr / UART transport | Source available. Application and overlay provide the Zephyr UART application and board configuration. |
| Linux host | CMake / virtual PHY | Host build and tests verified. v2.1.0 build instructions. Includes virtual PHY and TTY transport. |
UART is one part of the physical interface
A portable TIOL112 control driver is now available. Its host tests cover SIO polarity, transmit release, wake-up consumption, diagnostics and initialization failures. The driver and reference application also compile as Cortex-M0+ GCC objects. The reference projects supply MCU callbacks and wiring instructions.
The MCU UART transports bytes. A physical IO-Link design also needs the transceiver, supply and C/Q circuitry, control and fault GPIOs, wake-up handling and measured timing. The projects include portable TIOL112 and L6362A control drivers for these interfaces.
Manufacturer references
- TIOL112 product documentation and datasheet.
- ST STEVAL-IOD003V1 documentation: an L6362A evaluation board with a UART/GPIO controller interface. The ESP32 reference wiring guide specifies the GPIO connections and shield configuration.
- ST Nucleo-G0B1RE board reference.
- Zephyr Nucleo-L476RG board documentation and ESP-IDF getting started. These cover board setup and platform tools.
LabWired firmware recipes
Download the recipes to execute the reference MCU firmware with the documented engine pins and inputs. STM32G0 assertions cover startup, the 1 MHz timer, UART/GPIO setup, the firmware wake interrupt and COM2 configuration. ESP32-C3 assertions cover ROM and second-stage boot, application execution, GPIO ISR, UART GPIO-matrix routing and COM2 8E1. The C3 recipe uses an experimental published engine revision. STM32U5 evidence is a firmware build and host adapter tests.
Before a physical bench test
Record your exact MCU board, transceiver board/revision, pin connections, firmware commit and toolchain. Use the vendor wiring and power documentation, then capture a commercial master's model and firmware, IODD, COM mode, process-data sizes and test results. Publish logs for startup, cyclic data, ISDU, events and reconnect behavior. See the physical validation checklist.
The standalone master stack is a separate software project. Running it against the device stack in simulation exercises software protocol interactions.